Optoelectronic devices can convert radiant energy into electrical energy or vice versa. These devices generally include an active layer sandwiched between two electrodes, sometimes referred to as the front and back electrodes, at least one of which is typically transparent. The active layer typically includes one or more semiconductor materials. In a light-emitting device, e.g., a light-emitting diode (LED), a voltage applied between the two electrodes causes a current to flow through the active layer. The current causes the active layer to emit light. In a photovoltaic device, e.g., a solar cell, the active layer absorbs energy from light and converts this energy to electrical energy exhibited as a voltage and/or current between the two electrodes. Large scale arrays of such solar cells can potentially replace conventional electrical generating plants that rely on the burning of fossil fuels. However, in order for solar cells to provide a cost-effective alternative to conventional electric power generation the cost per watt generated must be competitive with current electric grid rates. Currently, there are a number of technical challenges to attaining this goal.
Most conventional solar cells rely on silicon-based semiconductors. In a typical silicon-based solar cell, a layer of n-type silicon (sometimes referred to as the emitter layer) is deposited on a layer of p-type silicon. Radiation absorbed proximate the junction between the p-type and n-type layers generates electrons and holes. The electrons are collected by an electrode in contact with the n-type layer and the holes are collected by an electrode in contact with the p-type layer. Since light must reach the junction, at least one of the electrodes must be at least partially transparent. Many current solar cell designs use a transparent conductive oxide (TCO) such as indium tin oxide (ITO) as a transparent electrode.
A further problem associated with existing solar fabrication techniques arises from the fact that individual optoelectronic devices produce only a relatively small voltage. Thus, it is often necessary to electrically connect several devices together in series in order to obtain higher voltages in order to take advantage of the efficiencies associated with high voltage, low current operation (e.g. power transmission through a circuit using relatively higher voltage, which reduces resistive losses that would otherwise occur during power transmission through a circuit using relatively higher current).
Several designs have been previously developed to interconnect solar cells into modules. For example, early photovoltaic module manufacturers attempted to use a “shingling” approach to interconnect solar cells, with the bottom of one cell placed on the top edge of the next, similar to the way shingles are laid on a roof. Unfortunately the solder and silicon wafer materials were not compatible. The differing rates of thermal expansion between silicon and solder and the rigidity of the wafers caused premature failure of the solder joints with temperature cycling.
A further problem associated with series interconnection of optoelectronic devices arises from the high electrical resistivity associated with the TCO used in the transparent electrode. The high resistivity restricts the size of the individual cells that are connected in series. To carry the current from one cell to the next the transparent electrode is often augmented with a conductive grid of busses and fingers formed on a TCO layer. However, the fingers and busses produce shadowing that reduces the overall efficiency of the cell. In order for the efficiency losses from resistance and shadowing to be small, the cells must be relatively small. Consequently, a large number of small cells must be connected together, which requires a large number of interconnects and more space between cells. Arrays of large numbers of small cells are relatively difficult and expensive to manufacture. Further, with flexible solar modules, shingling is also disadvantageous in that the interconnection of a large number of shingles is relatively complex, time-consuming and labor-intensive, and therefore costly during the module installation process.
To overcome this, optoelectronic devices have been developed with electrically isolated conductive contacts that pass through the cell from a transparent “front” electrode through the active layer and the “back” electrode to an electrically isolated electrode located beneath the back electrode. U.S. Pat. No. 3,903,427 describes an example of the use of such contacts in silicon-based solar cells. Although this technique does reduce resistive losses and can improve the overall efficiency of solar cell devices, the costs of silicon-based solar cells remains high due to the vacuum processing techniques used in fabricating the cells as well as the expense of thick, single-crystal silicon wafers.
This has led solar cell researchers and manufacturers to develop different types of solar cells that can be fabricated less expensively and on a larger scale than conventional silicon-based solar cells. Examples of such solar cells include cells with active absorber layers comprised of silicon (e.g. for amorphous, micro-crystalline, or polycrystalline silicon cells), organic oligomers or polymers (for organic solar cells), bi-layers or interpenetrating layers or inorganic and organic materials (for hybrid organic/inorganic solar cells), dye-sensitized titania nanoparticles in a liquid or gel-based electrolyte (for Graetzel cells), copper-indium-gallium-selenium (for CIG solar cells), cells whose active layer is comprised of CdSe, CdTe, and combinations of the above, where the active materials are present in any of several forms including but not limited to bulk materials, micro-particles, nano-particles, or quantum dots. Many of these types of cells can be fabricated on flexible substrates (e.g., stainless steel foil). Although these types of active layers can be manufactured in non-vacuum environments, the intra-cell and inter-cell electrical connection typically requires vacuum deposition of one or more metal conducting layers.
For example FIG. 6A illustrates a portion of a prior art solar cell array 600. The array 600 is manufactured on a flexible insulating substrate 602. Series interconnect holes 604 are formed through the substrate 602 and a bottom electrode layer 606 is deposited, e.g., by sputtering, on a front surface of the substrate and on sidewalls of the holes. Current collection holes 608 are then formed through the bottom electrode and substrate at selected locations and one or more semiconductor layers 610 are then deposited over the bottom electrode 606 and the sidewalls of the series interconnect holes 604 and current collection holes 608. A transparent conductor layer 612 is then deposited using a shadow mask that covers the series interconnect holes 604. A second metal layer 614 is then deposited over the backside of the substrate 602 making electrical contact with the transparent conductor layer 612 through the current collection holes and providing series interconnection between cells through the series interconnect holes. Laser scribing 616, 618 on the front side and the back side separates the monolithic device into individual cells.
FIG. 6B depicts another prior art array 620 that is a variation on the array 600. The array 620 is also manufactured on a flexible insulating substrate 622. Series interconnect holes 624 are formed through the substrate 622 and a bottom electrode layer 626 is deposited, e.g., by sputtering, on front and back surfaces of the substrate 622 and on sidewalls of the holes 624. Current collection holes 628 are then formed through the bottom electrode and substrate at selected locations and one or more semiconductor layers 630 and a transparent conducting layer 632 are then deposited over the bottom electrode 626 on the front side and on the sidewalls of the series interconnect holes 624 and current collection holes 628. A second metal layer 634 is then deposited over the backside of the substrate 622 using a shadow mask that covers everything except the current collection holes 628 making electrical contact with the transparent conductor layer 632. Laser scribing 636, 638 on the front side and the back side separates the monolithic device into individual cells.
There are two significant drawbacks to manufacturing solar cell arrays as shown in FIGS. 6A-6B. First, the metal layers are deposited by sputtering, which is a vacuum technique. Vacuum techniques are relatively, slow, difficult and expensive to implement in large scale roll-to-roll manufacturing environments. Secondly, the manufacturing process produces a monolithic array and sorting of individual cells for yield is not possible. This means that only a few bad cells can ruin the array and therefore increase cost. In addition, the manufacturing process is very sensitive to the morphology and size of the holes. Since the front to back electrical conduction is along the sidewall of the hole, making the holes larger does not increase conductivity enough. Thus, there is a narrow process window, which can add to the cost of manufacture and reduce yield of usable devices. Furthermore, although vacuum deposition is practical for amorphous silicon semiconductor layers, it is impractical for highly efficient solar cells based, e.g., on combinations of Copper, Indium, Gallium and Selenium or Sulfur, sometimes referred to as CIGS cells. To deposit a CIGS layer, three or four elements must be deposited in a precisely controlled ratio. This is extremely difficult to achieve using vacuum deposition processes.
Thus, there is a need in the art, for an optoelectronic device architecture that overcomes the above disadvantages and a corresponding method to manufacture such cells.